CARAT CAKE: Replacing Paging via Compiler/Kernel Cooperation


Virtual memory, specifically paging, is currently being challenged by new demands from modern workloads and this challenge is driving innovation in hardware/software codesign. Recent work has demonstrated the potential of an alternative software/software codesign, in which the combination of the compiler and kernel achieves the goals of virtual memory for unmanaged languages. This design can result in dramatically simplified hardware requirements, even to the point of supporting only physical addressing. This freedom in turn provides enhanced freedom for cache design, which is currently coupled with address translation. While the case for this Compiler- And Runtime-based Address Translation (CARAT) concept has been made, the previous evaluation was based on a user-level prototype and did not address the numerous challenges posed by kernel-level implementation of abstractions such as processes on top of CARAT. This work demonstrates that these challenges can be surmounted. We report on incorporating CARAT into a kernel, forming Compiler- And Runtime-based Address Translation for CollAborative Kernel Environments (CARAT CAKE). In our prototype implementation, a Linux-compatible x64 process abstraction can be based either on CARAT CAKE, or on a sophisticated paging implementation. Implementing CARAT CAKE involves not only kernel changes, but also new compiler optimizations and transformations that must work on all code in the system, including kernel code. We evaluate our CARAT CAKE implementation in comparison with paging (and with traditional Linux) using the NAS benchmark suite. We find that CARAT CAKE is able to achieve the protection, mapping, and movement properties of paging as well as the ability to move and compact both user and kernel memory, as required by physical addressing, with reasonable overhead. However, CARAT CAKE’s memory management can operate at arbitrary granularity instead of being restricted to pages and the hardware is not involved in memory management.

Siyuan Chai
Siyuan Chai

Incoming CS Ph.D. at UIUC